Have you encountered the same issue when using RZN2L? This problem has been troubling me for several days.
I have also tried using the motor kit's routines in r12an0123xx0400-cn032-ac-servo-solution\Software\Firmware\rzn2l\Project\iccarm\flash_boot , and Error while calling macro
execUserFlashInit"
Evironment：
Cn032-ac-servo-solution RSK
iar 9.40
I-jet/J-link
The program is the simplest one generated using FPS, and the debugger settings are as follows：
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When I click on 'download and debugger,' it prompts the following message：
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Debug log：
Wed Oct 25, 2023 09:49:19: : IAR Embedded Workbench 9.40.1 (C:\Program Files\IAR Systems\Embedded Workbench 9.2\arm\bin\armPROC.dll)
Wed Oct 25, 2023 09:49:19: : Loaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 9.2\arm/config/debugger/Renesas/RZN2L.dmac
Wed Oct 25, 2023 09:49:19: : Loaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 9.2\arm/config/flashloader/Renesas/FlashRSK_RZN2L_SerialFlash.mac
Wed Oct 25, 2023 09:49:19: : Loading the I-jet driver
Wed Oct 25, 2023 09:49:19: : Probe: Probe SW module ver 1.67
Wed Oct 25, 2023 09:49:19: : Probe: Option: trace(Auto,size_limit=100%)
Wed Oct 25, 2023 09:49:19: : Probe: Found I-jet, SN=93039
Wed Oct 25, 2023 09:49:19: : Probe: Opened connection to I-jet:93039
Wed Oct 25, 2023 09:49:19: : Probe: USB connection verified (11986 packets/s)
Wed Oct 25, 2023 09:49:19: : Probe: I-jet, FW ver 7.2, HW Ver:B
Wed Oct 25, 2023 09:49:19: : Probe: None or IJET-MIPI10 adapter detected
Wed Oct 25, 2023 09:49:19: : Probe: Versions: JTAG=1.96 SWO=1.41 A2D=1.74 Stream=1.52 SigCom=2.46
Wed Oct 25, 2023 09:49:19: : Emulation layer version 5.21
Wed Oct 25, 2023 09:49:19: : SWD clock detected: 12MHz
Wed Oct 25, 2023 09:49:19: : Notification to core-connect hookup.
Wed Oct 25, 2023 09:49:19: : DMAC:_ExecDeviceCoreConnect()
Wed Oct 25, 2023 09:49:19: : Connected DAP v2 on SWD. Detected DP ID=0x6ba02477.
Wed Oct 25, 2023 09:49:19: : Connecting to TAP#0 DAP APB-AP port 0x1 (IDR=0x5477'0002) to core Cortex-R52 r1p3 ARMv8.0 by ARM at 0x8041'0000.
Wed Oct 25, 2023 09:49:19: : Debug authentication:
Wed Oct 25, 2023 09:49:19: : Non-secure invasive debug enabled
Wed Oct 25, 2023 09:49:19: : Non-secure non-invasive debug enabled
Wed Oct 25, 2023 09:49:19: : Secure invasive debug not implemented
Wed Oct 25, 2023 09:49:19: : Secure non-invasive debug not implemented
Wed Oct 25, 2023 09:49:19: : Separate Hyp invasive debug enabled
Wed Oct 25, 2023 09:49:19: : Separate Hyp non-invasive debug enabled
Wed Oct 25, 2023 09:49:19: : Core features:
Wed Oct 25, 2023 09:49:19: : EL0 in AArch32
Wed Oct 25, 2023 09:49:19: : EL1 in AArch32
Wed Oct 25, 2023 09:49:19: : EL2 (hypervisor) in AArch32
Wed Oct 25, 2023 09:49:19: : EL3 (secure monitor) not implemented
Wed Oct 25, 2023 09:49:19: : FP implemented
Wed Oct 25, 2023 09:49:19: : Advanced SIMD implemented
Wed Oct 25, 2023 09:49:19: : SVE not implemented
Wed Oct 25, 2023 09:49:19: : System register GIC interface 3.0 and 4.0 implemented
Wed Oct 25, 2023 09:49:19: : Detected CTI at 0x8042'0000
Wed Oct 25, 2023 09:49:19: : Debug resources: 8 H/W breakpoints, 8 watchpoints, 2 context ID breakpoints.
Wed Oct 25, 2023 09:49:19: : CPU status OK
Wed Oct 25, 2023 09:49:19: : LowLevelReset(hardware, delay 200)
Wed Oct 25, 2023 09:49:19: : Notification to init-after-hw-reset hookup.
Wed Oct 25, 2023 09:49:19: : DMAC:_ExecDeviceCoreConnect()
Wed Oct 25, 2023 09:49:19: : Connecting to TAP#0 DAP APB-AP port 0x1 (IDR=0x5477'0002) to core Cortex-R52 r1p3 ARMv8.0 by ARM at 0x8041'0000.
Wed Oct 25, 2023 09:49:19: : Debug authentication:
Wed Oct 25, 2023 09:49:19: : Non-secure invasive debug enabled
Wed Oct 25, 2023 09:49:19: : Non-secure non-invasive debug enabled
Wed Oct 25, 2023 09:49:19: : Secure invasive debug not implemented
Wed Oct 25, 2023 09:49:19: : Secure non-invasive debug not implemented
Wed Oct 25, 2023 09:49:19: : Separate Hyp invasive debug enabled
Wed Oct 25, 2023 09:49:19: : Separate Hyp non-invasive debug enabled
Wed Oct 25, 2023 09:49:19: : Core features:
Wed Oct 25, 2023 09:49:19: : EL0 in AArch32
Wed Oct 25, 2023 09:49:19: : EL1 in AArch32
Wed Oct 25, 2023 09:49:19: : EL2 (hypervisor) in AArch32
Wed Oct 25, 2023 09:49:19: : EL3 (secure monitor) not implemented
Wed Oct 25, 2023 09:49:19: : FP implemented
Wed Oct 25, 2023 09:49:19: : Advanced SIMD implemented
Wed Oct 25, 2023 09:49:19: : SVE not implemented
Wed Oct 25, 2023 09:49:19: : System register GIC interface 3.0 and 4.0 implemented
Wed Oct 25, 2023 09:49:19: : Debug resources: 8 H/W breakpoints, 8 watchpoints, 2 context ID breakpoints.
Wed Oct 25, 2023 09:49:19: : CPU status - IN RESET
Wed Oct 25, 2023 09:49:20: : Processor did not stop on hardware reset.
Wed Oct 25, 2023 09:49:20: : CPU status OK
Wed Oct 25, 2023 09:49:20: : Loaded debugee: C:\Program Files\IAR Systems\Embedded Workbench 9.2\arm/config/flashloader/Renesas/FlashRSK_RZN2L_SerialFlash.out
Wed Oct 25, 2023 09:49:20: : Target reset
Wed Oct 25, 2023 09:49:20: : Unloaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 9.2\arm/config/flashloader/Renesas/FlashRSK_RZN2L_SerialFlash.mac
Wed Oct 25, 2023 09:49:20: : The flash loader program reported an error.
Wed Oct 25, 2023 09:49:20: : The debug log may contain more details.
Wed Oct 25, 2023 09:49:22: : Unloaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 9.2\arm/config/debugger/Renesas/RZN2L.dmac
Wed Oct 25, 2023 09:49:24: : Loading the I-jet driver
Wed Oct 25, 2023 09:49:24: : IAR Embedded Workbench 9.40.1 (C:\Program Files\IAR Systems\Embedded Workbench 9.2\arm\bin\armPROC.dll)