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RE: XIP Kernel with Single Quad-SPI on RZ/A1 RSK

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One other thing I noticed is that u-boot uses the bank command as well. So, if you do a read of an address above 16MB (sf read xxx) , it sets the bank register which might screw things up when you boot if you are assuming there is not bank register. The easy fix for that is to just do a dummy read of some SPI flash address below 16MB.

Yes, it's recommended to reset the SPI flash any time you reboot the system because of that exact issue (the bank being set). Also on some SPI flash, the kernel will put the SPI flash into "extended address mode" meaning the SPI flash then expects 4-byte address for a legacy SPI READ (0x03) command instead of just 3 bytes of address.....but the RZ has no idea about that. so when it goes to boot it will send out a READ command (0x03) followed by a 3-byte address (00 00 00) and then get back garbage because the SPI flash is thinking another address byte is coming.


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