RenesasQE_display_V100

Hi,

I have some questions about the RenesasQE_display_V100 tool:

1. something when using the tool and updating registers on the display i see not only the green screen, but also one rollling test (red, green, blue, checkered pattern, ecc.), it's this an hidden feature? how can i activate it? I am not able to reproduce every time.
2. The generated header has the value of LCD_CH0_TCON_HALF equal to value of LCD_CH0_SIG_FH+1, it's a bug? I  think that the value must be LCD_CH0_SIG_FH/2 (TCON reference timing, 1/2fH timing(HTP)) it's correct?
3. My board is clocked only by the 48Mhz USB xtal, on one of my display i need the panel clock set to 9Mhz, i have these settings:
   #define LCD_CH0_PANEL_CLK VDC5_PANEL_ICKSEL_PERI /* Panel clock select */
   #define LCD_CH0_PANEL_CLK_DIV VDC5_PANEL_CLKDIV_1_7 /* Panel clock frequency division ratio */
   64.0Mhz/7=9,142857Mhz
   i'ts correct to enter this value on the "Panel Clock Frequency" combo box? (see attached image)

Thanks in advance.