I'm adapting some Renesas code to my hardware - and one of the changes is to use SCIF7 instead of SCIF2. I've changed all the pin configurations and set up the registers as I did on another project - but the bit rate is coming out at exactly 1/16 of what I expect.
In other words, I'm trying for 115,200 bps and seeing 7,200 bps.
I've gone over my code multiple times, but see nothing wrong. Can someone else take a quick look to see if I'm missing something obvious?
Or is there a common mistake people make in this area that could explain the 1/16 mistake?
Thanks. Here's the code...
void IoInitScif7(void)
{
volatile uint8_t dummy_buf;
volatile uint16_t dummy16_buf;// This module can only be used on the VMSv4
/* === Initialization of SCIF7 ==== */
/* P1 clock=60.00MHz CKS=0 SCBRR=15 Bit rate error=1.7% => Baud rate=115200bps */
// (can't use R_SCIF_UART_Init() since that code is specific to SCIF2)/* enable SCIF7 clock */
CPG.STBCR4 &= ~(CPG_STBCR4_MSTP40);
dummy_buf = CPG.STBCR4;/* GPIO Settings:P7_4 = TxD7 (4th alternate) */
/* GPIO Settings:P7_5 = RxD7 (4th alternate) */
#define GPIO_BIT_N4 (1 << 4)
#define GPIO_BIT_N5 (1 << 5)
GPIO.PIBC7 &= ~(GPIO_BIT_N4 | GPIO_BIT_N5);
//GPIO.PBDC7 &= ~(GPIO_BIT_N4 | GPIO_BIT_N5);
GPIO.PM7 |= (GPIO_BIT_N4 | GPIO_BIT_N5);
GPIO.PMC7 |= (GPIO_BIT_N4 | GPIO_BIT_N5);
GPIO.PIPC7 |= (GPIO_BIT_N4 | GPIO_BIT_N5);
GPIO.PBDC7 &= ~(GPIO_BIT_N4 | GPIO_BIT_N5);
GPIO.PFC7 |= (GPIO_BIT_N4 | GPIO_BIT_N5);
GPIO.PFCE7 |= (GPIO_BIT_N4 | GPIO_BIT_N5);
GPIO.PFCAE7 &= ~(GPIO_BIT_N4 | GPIO_BIT_N5);/* ---- Serial control register (SCSCR2) setting ---- */
/* SCIF transmitting and receiving operations stop */
SCIF7.SCSCR = 0x0000u;/* ---- FIFO control register (SCFCR2) setting ---- */
/* Transmit FIFO reset */
/* Receive FIFO data register reset */
SCIF7.SCFCR |= (SCIFn_SCFCR_TFRST | SCIFn_SCFCR_RFRST);/* ---- Serial status register(SCFSR2) setting ---- */
/* ER,BRK,RDF,DR bit clear */
dummy16_buf = SCIF7.SCFSR;
SCIF7.SCFSR = 0u;/* ---- Line status register (SCLSR2) setting ---- */
/* ORER bit clear */
dummy16_buf = SCIF7.SCLSR;
SCIF7.SCLSR = 0u;/* ---- Serial control register (SCSCR2) setting ---- */
/* CKE 00 : Internal CLK */
SCIF7.SCSCR &= ~(SCIFn_SCSCR_CKE);/* ---- Serial mode register (SCSMR2) setting ---- */
/* Communication mode 0: Asynchronous mode
Character length 0: 8-bit data
Parity enable 0: Add and check are disabled
Stop bit length 0: 1 stop bit */
SCIF7.SCSMR &= ~(SCIFn_SCSMR_CA | SCIFn_SCSMR_CHR | SCIFn_SCSMR_PE | SCIFn_SCSMR_OE | SCIFn_SCSMR_CKS);/* ---- Sets the Serial extension mode register (SCEMR2) ---- */
/* Baud rate generator double-speed mode, 0: Normal mode */
/* Base clock select in asynchronous mode, */
/* 0: Base clock is 16 times the bit rate */
SCIF7.SCEMR = 0x0000u;/* ---- Bit rate register (SCBRR2) setting ---- */
SCIF7.SCBRR = 15u; // Actual = 117,188 (+1.7%)/* ---- FIFO control register (SCFCR2) setting ---- */
/* RTS output active trigger :Initial value
Receive FIFO data trigger :1-data
Transmit FIFO data trigger :0-data
Modem control enable :Disabled
Receive FIFO data register reset :Disabled
Loop-back test :Disabled */
SCIF7.SCFCR = 0x0030u;/* ---- Serial port register (SCSPTR2) setting ---- */
/* Serial port break output(SPB2IO) 1: Enabled */
/* Serial port break data(SPB2DT) 1: High-level */
SCIF7.SCSPTR |= 0x0003u;/* === Enable SCIF7 transmission/reception ==== */
/* ---- Serial control register (SCSCRi) setting ---- */
SCIF7.SCSCR = 0x0030u;
/* SCIF7 transmitting and receiving operations are enabled */
}