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RZA SCIF DR Flag

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For my current project i want to detect when a continous transmission of data to my uart is ending.

 

I implemented the usage of the Receive Data Ready (RD) Flag from the Serial Status Register (SCFSR).

My problem is that the incomming data is a multiple of 16 Bytes and i have configured the receive FIFO data trigger to 8 bytes in the FIFO Control Register.

When i receive a package with 16 Bytes it works out as follows:

1. Receive interrupt is triggered for the first 8 bytes received, 8 bytes read out of fifo -> RDF flag is set, RD flag not

2. Receive interrupt is triggered second time for 8 bytes, 8 bytes read out of fifo  -> RDF flag is set, RD flag not.

3. Nothing -> no RD flag is ever set. 

 

I assume this happens because the receive fifo is empty.

So my workaround was to only read 7 instead of all 8 Bytes out of the fifo when it contains 8 bytes. The one remaining byte will cause the trigger of the RD flag.

Is there a better way of doing this?

 

Kind regards,

Christof


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