renesas graphic architecture - freeRtos
Hi all,I've already built and run RGA renesas projects into a customized board.I'm now aiming to merge a FreeRTOS project with the RGA one.Is there anyone that already succeeded in doing that?Thanks...
View ArticleRE: Need help diagnosing a system hang (CMSIS-RTX, Custom board)
I want to confirm your situation.When you debugged to use J-Link on e2studio, the infinite loop occurred in the CAN initialization.But without the J-Link, it does not occurs. (but another issue...
View ArticleRE: Need help diagnosing a system hang (CMSIS-RTX, Custom board)
Hi jdseymourYou said: your program has been working well. And after you have modified it, it occasionally goes into the ditch.Then, first of all, you should check where you have modified.----You said:...
View ArticleRE: Need help diagnosing a system hang (CMSIS-RTX, Custom board)
Aha! Possible breakthrough...I have two debug environments (each with its own linker definition file). The first loads my code into NOR flash and the second loads it into RAM. I can only do...
View ArticleRE: renesas graphic architecture - freeRtos
I get started using the FreeRTOSV8.1.2_RZ_RSK_e2studio zip software packet.Thanks to Jan for having posted another valid RTOS zip project on the media gallery, anyway.After having properly built a...
View ArticleDDR memory types for RZ/G
[Q]What are the DDR memory types and data rates supported by the RZ/G1E and the RZ/G1M?[A]The supported DDR memory types and data rates are as follows. -RZ/G1E: DDR3 @1333 Mbps 32-bit x 1 -RZ/G1M:...
View ArticleMaximum dot clock for image output(RZ/G)
[Q]What is the frequency of the maximum dot clock for image output?[A]The LVDS interface supports dot clocks up to 148.5 MHz. Please use a panel that supports single link. (RZ/G1N, RZ/G1M)DRGB digital...
View ArticlePackages for RZ/G
[Q]What are the packages for RZ/G?[A]Packages are as follows. -RZ/G1E: Flip Chip BGA, 501-pin, 21 x 21 mm, 0.8 mm ball pitch -RZ/G1N, RZ/G1M: Flip Chip BGA, 831-pin, 27 x 27 mm, 0.8 mm ball pitch
View ArticleGuidelines for mounting on a board (RZ/G)
[Q]Are there any guidelines for mounting on a board? Also, is there a recommended number of board layers?[A]The following guidelines for a mounting guidelines For details,please contact a Renesas sales...
View ArticleRE: GPIO register read-modify-write not working
> GPIO.PFCAE1 &= ~(1 << 0); // PFCAE = 0 : \> GPIO.PFCE1 |= (1 << 0); // PFCE = 1 : 3rd alternative function> GPIO.PFCAE1 &= ~(1 << 10); // PFCAE...
View ArticleRE: GPIO register read-modify-write not working
Alternatively, you can use the code below that wrote for our RZ/A1 u-boot and then you would just have to do:pfc_set_pin_function(1, 0, ALT3, 0, 0); /* P1_0 = TCLKA */pfc_set_pin_function(1, 10, ALT4,...
View ArticleRE: GPIO register read-modify-write not working
Damn. That's embarrassing.That did the trick! Thanks.
View ArticleGPIO register read-modify-write not working
Can someone look at the code below and tell me if there's something wrong? The "if" statement at the bottom is always true - meaning the read-modify-writes to PFCE1 are not working as I expect.Either...
View ArticleRE: RESET status register
> Up to now I found the mbed team uses WDT reset to implement software reset (CMSIS function NVIC_SystemReset) - this> is somehow strange, I wonder if they did this because there is no other way...
View ArticleRE: Firmware not starting on power-on reset
> - software is pre-loaded, system is power cycled, SW does not start but then I make pin reset> (short RST pin to ground go a moment) - when I release the RST the SW startsI would look at your...
View ArticleRE: Firmware not starting on power-on reset
OK, TRST is not driven by the supervisor - it is pulled up to 3.3V and there is a small capacitor to ground. If I understand you right, we have to drive both RST and TRST from the supervisor ouput? I...
View ArticleRE: RESET status register
OK, we have used similar approach (workaround) some 10 years ago on a microcontroller that also missed this information from the HW.But it was not that simple - we had to use several RAM cells to be...
View ArticleRE: RESET status register
The WTCSR.IOVF bit inside the watchdog will not be initialized by POR, so with this you can distinguish between a POR and a WD reset.Also, the WDTOVF hardware signal can be output on a WD overflow...
View ArticleRE: Firmware not starting on power-on reset
> I recall the there was a note in the manual that if debug is not used than the TRST must be pulled DOWN.It's not really a 'must', it's more of a recommendation. They just want to make sure the...
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