RE: Confused about CAN receive rules & buffers
Thanks for the response. The key part in the code snippet (and the key to my confusion) is the line that has the comment, "SET RECEIVE BUFFER NUMBER HERE!".It looks as though each receive rule fills...
View ArticleConfused about CAN receive rules & buffers
My needs are simple. I want to receive all CAN messages on the bus. Therefore, it seems like I only need one receive rule (with RSCAN0GAFLMj=0 and GAFLDLC=0 so there is no filtering).However, I'm...
View ArticleRE: Frame Buffer on RZ A1H
> Frame Buffer size on Resesas RZ A1H kit is 32 bit. I'm trying to change the frame buffer size to 16 bit.>> cat /sys/devices/platform/vdc5fb.0/graphics/fb0/bits_per_pixel command on RZ...
View ArticleRE: Frame Buffer on RZ A1H
Thank you for the quick response, I'll try this and will get back if I have any further queries...
View ArticleFrame Buffer on RZ A1H
Frame Buffer size on Resesas RZ A1H kit is 32 bit. I'm trying to change the frame buffer size to 16 bit. cat /sys/devices/platform/vdc5fb.0/graphics/fb0/bits_per_pixel command on RZ A1H kit...
View ArticleRE: USB Ethernet
In the BSP, you can find instructions under: doc/testing/usb-function.txtgithub.com/.../usb-function.txtChris
View ArticleUSB Ethernet
How to start Ethernet over USB for Renesas RZA1H board?I can see the Ethernet Gadget (with CDC Ethernet support) selected in the kernel configuration and loadable module support is disabled. When board...
View Articlerza1h 256 QFP library
Hi!I'm looking for the the eda library for the rza1h (R7S72100) but I can't find it.Could you please tell me where to find the symbol and the footprint for this component?Thanks in advance!
View ArticleRE: Do Peripheral Busses need to be enabled somehow?
> Are there configuration registers somewhere for these busses?Not for the buses, but for the clock sources.You can individually shut the clock source off to the peripheral blocks (to save...
View ArticleRE: Do Peripheral Busses need to be enabled somehow?
Thank you. That was it. My PWM is now operational - and I'm sure I can get the display working, as well.
View ArticleDo Peripheral Busses need to be enabled somehow?
I'm working on some bare-metal programming on a RZ/A1M-based design. Recently, I've adapted both a display sample and a PWM sample - and in both cases, I get NO output on any of the expected pins.I've...
View ArticleRZ/A1H, Linux, SCIF and DMA
Hello.I'm using RZ/A1H (R7S721000) chip under Linux.In my project I need several SCIF ports to operate in fast bitrates, but encountered massive overruns.In 1Mbps speed overruns happens every 16-32...
View ArticleRE: RZ/A1H, Linux, SCIF and DMA
Hi vap,> In 1Mbps speed overruns happens every 16-32 bytes (one or two FIFO fills), and even in 38400bps - several times in a minute.Is RTS/CTS hardware flow-control supported and enabled on SCIF...
View ArticleRE: RZ/A1H, Linux, SCIF and DMA
I cannot use RTS/CTS... Three ports are connected to GNSS receivers that have no RTS/CTS pins (and needs 230400bps in some configurations; BTW, it is another problem because bit rate error is...
View ArticleRE: RZ/A1H, Linux, SCIF and DMA
Do you have to have a tty interface? Or can you use the SCIF directly?For example, I wanted to print out current RAM and CPU usage in a kernel thread, but using the tty-SCIF driver from inside the...
View ArticleRE: RZ/A1H, Linux, SCIF and DMA
Hi vap,> BTW, it is another problem because bit rate error is particularly high with this bit rate.There is a note near Table 14.4 in RZ/A1H Group User's Manual: Hardware."The bit rate error should...
View ArticleRE: Discrepancy/Bug with LVDSPLL_TST register in VDC5 sample
Good point. The Linux driver does the same thing:github.com/.../vdc5fb.c tmp = vdc5fb_read(priv, LCLKSELR); /* Internal parameter setting for LVDS PLL */ tmp |= LVDS_SET_TST(0x0008); vdc5fb_write(priv,...
View Article