XIP Linux max rom size?
Hi, allI have two question.1. Is there a maximum ROM size that can be configured with XIP Linux on RZ / A1M?and Can the kernel and applications be stored in the SPI flash, and the image data stored in...
View ArticleRE: XIP Linux max rom size?
Thanks a lot Chris.> and the image data stored in the NAND flash?Yes. That would work. Others store data in SPI Flash using an extra 1-bit SPI channel.-> If other SPI channel use SPI NAND Flash,...
View ArticleRE: XIP Linux max rom size?
The 64MB limit is only for "XIP mode" of the QSPI flash controller.To access SPI flash using normal (non-XIP) mode, there is no 64MB limit. You can access as big as you want.
View ArticleRE: Can't get I2C to work
Hi Sachin,You have to set the PBDC register (54.3.13 in the user manual) for the port used. The procedure for configuring the pins is described in figure 54.4 on page 54-32 of the user manual.
View ArticleRE: RZA1 RSK Adding Device Tree Node for MMC0
So using the settings suggested by philbot999, I get a lot more success until I reach:Verifying filesystem skeleton...ERROR...
View ArticleRE: RZA1 RSK Adding Device Tree Node for MMC0
Can you post the commands that you ran to build the modules within the build_utilities directory?
View ArticleRE: RZA1 RSK Adding Device Tree Node for MMC0
After configuring the setup-env file I ran the following:$ ./build_wl18xx.sh init$ ./build_wl18xx.sh update R8.7_SP1That fails regardless of whether or not I point it at my buildroot fs, or the default...
View ArticleRE: RZA1 RSK Adding Device Tree Node for MMC0
Nevermind I failed to run verify kernel config and rebuild kernel.
View ArticleRE: RZA1 RSK Adding Device Tree Node for MMC0
Hmm - that is strange that it fails for you. Which step fails? I just blew away my build_utilities directory and rebuilt with the following steps. It worked fine:>> rm -rf build-utilites/>>...
View ArticleRE: RZA1 RSK Adding Device Tree Node for MMC0
Hi philbot999,Firstly Sorry for my bad English.I'm also tried to porting on RZA1 Board and I have some strange situation here.If I connect the WL_IRQ pin between WL18XX SDIO Board and IRQ4 pin on RZA1...
View ArticleRE: How to Integrate New QSPI Serial Flash with RZ/A1L
Hi philbot999As far as reading your entire post, it seems to be a u-boot problem rather than a QSPI Serial Flash problem with RZ/A1L.As soon as your u-boot written to the QSPI flash started running, it...
View ArticleHow to Integrate New QSPI Serial Flash with RZ/A1L
We are trying to integrate a single N25Q00AA ( 128 MByte ) QSPI Flash with the RZ/A1L on a custom board. Previously we had been successfully developing with the RZ/A1H RSK Dev Kit, which has the...
View ArticleRE: How to Integrate New QSPI Serial Flash with RZ/A1L
Hi Pecteilis,Thank you very much for the insight. This solved my problem - I had to change the RAM size to 3MB in "./include/configs/rskrza1.h". Now I can boot u-boot.I am still working on getting...
View ArticleRE: RZ/A1L GPIO versus RZ/A1H GPIO
Hi Chris,We have received our Boards with the RZ/A1L and I am working to bring the board up. I made the changes to U-boot so that it boots to the u-boot prompt with the RZ/A1L and a new serial flash....
View ArticleRE: RZ/A1L GPIO versus RZ/A1H GPIO
Phil,First...are you following the BPS porting guide????renesasrulz.com/.../2719.aspxYes, it's a pain in the ass following it step by step, but it will pay off in the long run. There are some hints in...
View ArticleRZ/A1L GPIO versus RZ/A1H GPIO
In the BSP for the RZA1H Dev Kit there is the following array of GPIO names:static const char * const gpio_names[] = {"P0_0", "P0_1", "P0_2", "P0_3", "P0_4", "P0_5","P1_0", "P1_1", "P1_2", "P1_3",...
View ArticleRE: RZ/A1L GPIO versus RZ/A1H GPIO
Hi Chris,Wow - thank you for passing along that document, it was very helpful!I can now boot the RZ/A1L on our board in U-boot and launch my XIP Linux image when it is configured for internal RAM (...
View ArticleRE: RZ/A1L GPIO versus RZ/A1H GPIO
Hi Phil,> I cannot, however use our External SDRAM with Linux ( 32MB 48LC16M16A2 ). We made our> board identical to the RSK for the SDRAM interface ( CS2 ), hI assume you went through and SDRAM...
View ArticleRE: RZ/A1L GPIO versus RZ/A1H GPIO
Hi Chris,Thanks - I'm starting to think it is not an SDRAM issue..Early printk shows this:Booting Linux on physical CPU 0x0Linux version 3.14.79-ltsi (me@company) (gcc version 4.8.3 20140203...
View ArticleRE: RZ/A1L GPIO versus RZ/A1H GPIO
Hi Phil,> I've read on a couple other forum posts that if it hangs on the bootconsole disabled message, the device tree could be wrong.It's not really hanging ....it's still booting, just without a...
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