9DML4493A - PCIe Gen5 clock Multiplexer Glitch free or not

Hi,

We are using  9DML4493ANLGI in our design for PCIe clock distribution. In the datasheet it's mentioned that "Glitch-free output enable pins for each output". Does this mean we need to toggle O/P enable for every clock switch to get glitch free clock? or does this mux supports glitch free clock output by default?

Appreciate your response.

Regards

Prathap