SDRAM memory maximum frequency
Hello! What is the maximum frequency for SDRAM memory? I use the module that able to work at 166MHz frequency. But what about RZ/A1 controllers? I want to execute the code from SDRAM, so it's...
View ArticleRE: XIP speed from SDRAM and QSPI FLASH
The RZ/A1 RSK has 16-bit SDRAM and 2 QSPI Flash, so you can do some experiments to determine what is best for your application.
View ArticleXIP speed from SDRAM and QSPI FLASH
From what memory the code execution will be faster? From 32-bit SDRAM or 2 QSPI-NOR flashes (8-bit bus), did anyone make comparison? I want to work with vector graphics, use 720p display, and the code...
View ArticleMaximum supported resolution in RZ/A1L
What is the maximum supported resolution by RZ/A1L controllers ? On this page there is information that RZ/A1L controllers has VDC5: XGA (1024 x 768)...
View ArticleRE: DMA Link mode problem
Thank you for your reply, I'll try to get it work with your suggestions.
View ArticleRE: Best way to submit patches
If you have a generic patch that you think would be helpful to others (bug fix, new driver feature), you can just post the patch here for review. As for platform specific files (like a new board-xxx.c...
View ArticleBest way to submit patches
Hello,I would like to know what is the best way to send patches for the Linux-3.14 ? Is it mandatory to use Github (I'm not used to it) or can we also send patches by e-mail ?Best regards
View ArticleRE: Add support for Motor Control PWM Timer
Thank you.It looks fairly straight forward as a PWM driver.But, as for it being a: "RZ/A1 Motor Control PWM Timer Driver", I don't think it is specifically a "Motor Control" PWM.Maybe, it is just a...
View ArticleRE: Add support for Motor Control PWM Timer
Thank you for your reply,Regarding the name I gave to the driver, I didn't have much inspiration so I took the name from RZA1 datasheet. But anyway I can change it according to what you said.You're...
View ArticleAdd support for Motor Control PWM Timer
Hello,I started to write a support for the Motor Control PWM Timer a few weeks ago and I would like to share it.This driver should be generic and control all PWM output.I tested it on my custom board...
View ArticleRE: __qadd16 intrinsic
Hi,First of all, you should read KPIT GCC manual. (The version may differ) Start Menu -> GNUARM-RZv13.01-EABI -> Documentation -> GNU manuals...
View Article__qadd16 intrinsic
Dear Sir, I use RZ/T1 GNU (KPIT) compiler. Does it support intrinsic command?Like __qadd16 of ARMCC.
View ArticleRE: SDRAM
Hi Chris,We modified the r7s72100-rskrza1.dts file memory node content as followsmemory@8000000 { device_type = "memory"; reg = <0x08000000 0x02000000 0x0C000000 0x02000000>;...
View ArticleRE: SDRAM
I just tried with the RSK board and it works.The RSK board has a single 32MByte SDRAM chip, but I made it think it has two 8Mbyte chips (with a 8Mbyte blank hole in the middle) memory {...
View ArticleRE: Transparent pixels?
Hi there,Can you give us more information about the tools you are using? Which development board, and what graphics tools are you using? RZ can handle multiple layers with transparency, which is...
View ArticleRE: Transparent pixels?
Sure. We're using a custom board of our own design (using a RZ/A1M chip). We're driving a 1024x768 LVDS display (from NLT, not sure of the exact model number). My code is based on the CMSIS-RTOS BSP...
View ArticleTransparent pixels?
I want to have a small video capture window with graphics around it. I've experimented with alpha blending, but I'm not seeing quite what I want. Is there a trick to creating "transparent" pixels on...
View ArticleRE: SDRAM
Thanq Chris for your replay..I have done the above changes from CS2 memory area and i got the same, but if made memory hole in between CS2 and CS3 area i am getting the problem(Hanging @ Starting...
View ArticleRE: SDRAM
Hi,I think that your u-boot script is wrong and copied kernel image is broken.setenv J2 'sf probe 0:1; sf read 0x09000000 100000 500000'should be setenv J2 'sf probe 0; sf read 0x09000000 100000...
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